本次美国代写是关于操作系统测试的assignment
T/F Questions
§ “A system can use either segmentation or paging; but
not both.”
• FALSE
§ “Consider a system using virtual memory techniques. In
order to maximize the CPU utilization, the kernel should admit more processes to the main memory if it observes that the current CPU utilization is low.”
• FALSE
§ “In a memory reference, it is possible have a TLB hit and
a page fault”.
• FALSE and TRUE!
The question was meant for a memory reference for direct addressing; but in case it is indirect addressing you may have a page fault after a TLB hit: TLB hit, read the page, TLB miss, page fault! (So you’ll get credit no matter what J )
T/F Questions (Cont.)
§ “In an operating system that supports preemptive
user-level scheduling, we must have a preemptive kernel”
• FALSE
§ “In general, Operating Systems assign a short time
quantum to high-priority interactive threads because they are I/O-bound.”
• TRUE
§ “Most important problem with the contiguous
memory allocation with variable-size partitions technique is the external fragmentation.”
• TRUE
T/F Questions (Cont.)
§ “TLB is primarily used to reduce the memory space
needed for the page tables.”
• FALSE
§ “The swapping feature is normally disabled on many
operating systems; the main reason is many processes are short-lived”.
• FALSE
§ “The x86-64 architecture uses multiple page sizes.”
• TRUE
T/F Questions (Cont.)
§ “When we use Partitioned Scheduling in SMP
environments, processor affinity is generally strong”.
• TRUE
§ “When we use segmentation, we can define different
access rights for different segments.”
• TRUE
§ “With Copy-on-Write feature, new (child) processes
can be created more quickly”.
• TRUE
Q. 13
§ A certain application runs in 30 minutes on a single
processor PXY system. A close analysis reveals that 6 minutes of execution is due to inherently sequential code, while the code for the remaining 24 minutes is fully parallelizable. We consider upgrading our system to a multi-core PXY system so as to make the running time at most 10 minutes. What is the minimum number of cores that we should use?
Q. 13 (Answer)
§ Desired Speedup Ratio is ≥ 30 / 10 = 3
§ Amdahl’s Law
Speedup = 1 / [S + (1 – S) / N] where S is the fraction of the serial part and N is the number of cores
S = 6 / 30 = 0.2
When we plug the numbers for S = 0.2 and Speedup Ratio = 3, we find N ≥ 6.
Question 14.
§ Consider an instruction within a certain
instruction-set architecture (ISA)
SUB R1, M2, R3. This instruction subtracts the contents of the memory location M2
(direct addressing) from the value in Register R1, and stores the result in Register R3. What is the maximum number of page faults that may be caused by this single instruction?
a) 1
b) 2
c) 3
d) 4
Q. 15 and Q. 16
§ Consider the following page reference string:
1, 3, 6, 3, 1, 5, 2 , 6, 3, 4, 1, 4, 6, 4, 6, 4, 5, 1, 3
Q.15 For the above reference string, what is the minimum size of the working set during execution, if at any time t, the working set window contains the last D = 5 page references? (Assume we start computing the working set after the first five references).
Q.16 How many page faults would occur for the LRU replacement algorithm assuming we have three frames, initially all empty?
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